AI Compiler & NPU IP
(In stock)
| Product Name | AI Compiler & NPU IP |
| Model Number | part of “AI Solution” series |
| Brand | Neowine Co., Ltd. (Seongnam, Republic of Korea) |
| Category | AI semiconductor design IP & compiler software for edge AI acceleration |
| Country of Origin | South Korea |
| Material | NPU IP Core:Composed of 1,024 MAC array processor supporting convolution (Conv3D, 1×1), depthwise conv, matrix multiplication, and quantized ops (Add/Mul, Sigmoid etc.) Processes AI workloads at ~4 TOPS performance level Employs quantization, operator fusion, and optimization to map models efficiently onto the NPU. |
| Applications | Institutions/ required for edge AI semiconductor development (technology) AI semiconductor development/research/education field for edge devices that apply video-based artificial intelligence such as IP cameras, drones, and AI robots (fabless, R&D, schools, etc.). |
NPU IP
Composed of 1,024 MAC Array Processors, NPU Core, and a large number of operators, supports a number of operations such as operators Conv3D, Conv1x1, Depthwise Convolution, MatMul, QLinearAdd/Mul, QLinear Sigmoid, etc., and the basic performance is at the level
of 4TOPS SW
ONNX structure can accept AI models developed in various frameworks such as TensorFlow and PyTorch, and it is a compiler for quantization of AI models, operator fusion to reduce weight and speed.
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